The present invention relates to inversion-mode (i.e. normally-off) insulated-gate field-effect transistor devices employing gallium arsenide, which is a high-voltage, low-resistance semiconductor material having a number of desirable charateristics. The invention more particularly relates to such devices for power switching applications.
Insulated-gate field-effect transistors (IGFETs) are advantageous in many applications due to their rapid switching speed and the fact they can be fabricated to have a high breakdown voltage (e.g. 500 volts), particularly in various vertical-channel configurations such as vertical-channel DMOS and vertical-channel VMOS. Moreover, a normally-off characteristic may readily be realized. Particular forms of these devices are known as metal-insulator-semiconductor field-effect transistors (MISFETs) and metal-oxide-semiconductor field-effect transistors (MOSFETs). Nearly all power MOSFETs employ silicon (Si) as the device semiconductor material.
Gallium arsenide (GaAs) is an alternative semiconductor material attractive for several reasons. For example, gallium arsenide has an electron mobility five times higher than that of silicon, a higher saturation velocity, and a wider energy gap. In short, gallium arsenide may be characterized as a high-voltage, low resistance semiconductor material.
It may be noted that GaAs is a Group III-V semiconductor inasmuch, in the periodic table of the elements, Ga is in Group III and As is in Group V. It may further be noted that there are other Group III-V semiconductors having characteristics related in some respects.
However, certain characteristics of gallium arsenide, discussed next below, make the fabrication of practical GaAs devices difficult. As a result, despite the above-noted advantageous characteristics of gallium arsenide, its actual use has primarily been limited to Schottky-gate metal-semiconductor field-effect transistors (MESFETs). MESFETs, like junction field-effect transistors (JFETs), are primarily depletion-mode (normally-on) devices. In depletion-mode FETs, a conduction channel exists between source and drain in the absence of gate voltage. To turn the device off requires the application of gate-voltage of the appropriate polarity to induce a depletion region to pinch off the channel. This normally-on characteristic is a disadvantage in many circuit applications.
On the other hand, an inversion-mode (normally-off) FET has a channel layer which is normally not conducting. This channel layer is defined in a semiconductor region of opposite conductivity type compared to the source and drain regions, which region of opposite conductivity type may be termed a shield base or, simply, base region. The channel layer is actually defined only when induced under the influence of gate voltage, which produces an inversion region. In an inversion-mode FET the gate electrode must be insulated from the semiconductor body of the FET.
As noted above, insulated-gate FET technology is well-developed in the case of silicon devices. In such devices, native oxide, i.e. SiO.sub.2, serves very well as a gate insulating layer.
On the other hand, while it is possible to form inversion layers in gallium arsenide under insulators, obtaining good interface properties (low surface state densities) between insulators and gallium arsenide has proven to be difficult. Thus, the conduction properties of such inversion layers are poor. These problems are addressed, for example, in T. Ito and Y. Sakai, "The GaAs Inversion-Type MIS Transistors", Solid-State Electronics, Vol. 17, pp. 751-759 (1974), which discusses interface properties between GaAs and various insulators such as SiO.sub.2, Si.sub.3 N.sub.4 and Al.sub.2 O.sub.3 films. All of these interfaces show instabilities, i.e., hysteresis and time drift of capacitance-voltage curves, and further, abnormal frequency dispersion of the capacitances. The solution proposed by Ito and Sakai is to employ, as the gate insulator, a chemically vapor deposited double layer film of Al.sub.2 O.sub.3 and SiO.sub.2. For further background, reference may be had to the following literature reference which identifies several reports of the fabrication of GaAs MOSFETs: C.W. Wilmsen and S. Szpak, "MOS Processing for III-V Compound Semiconductors: Overview and Bibliography", Thin Solid Films, Vol. 46, pp. 17-45 (1977).
There are other III-V semiconductors which have interface properties superior to GaAs and in which inversion regions under gate insulators may more readily be formed. For example, see D.L. Lile, D.A. Collins, L.G. Meiners and L. Messick, "n-Channel Inversion-Mode InP M.I.S.F.E.T.", Electronics Letters, Vol. 14, No. 20, pp. 657-659 (Sept. 20, 1978). Lile et al. discuss the great potential of microwave transistors based on III-V compounds, and point to several problems in the use of GaAs. Lile et al. propose and report on the performance of InP as an alternative semiconductor material. InP has interface properties superior to those of GaAs, and shares some of the advantageous characteristics of GaAs.
Similarly, another InP inversion-mode device is reported by T. Kawakami and M. Okamura, "InP/Al.sub.2 O.sub.3 n-channel Inversion-Mode M.I.S.F.E.T.S Using Sulfur-Diffused Source and Drain", Electronics Letters, Vol. 15, No. 16, pp. 502-504 (Aug. 2, 1979).
Another III-V semiconductor material is proposed in A.S.H. Liao, R.F. Leheny, R.I. Nahory and J.C. DeWinter, "An In.sub.0.53 Ga.sub.0.47 As/Si.sub.3 N.sub.4 n-Channel Inversion Mode MISFET", IEEE Electron Device Letters, Vol. EDL-2, No. 11, pp. 288-290 (1981). Liao et al demonstrate that inversion layers under a gate insulator can be formed in Ga.sub.x In.sub.1-x As where x=0.47.
While InP and Ga.sub.x In.sub.1-x As have the property that inversion layers may more readily be formed, they are not as good as GaAs in terms of being high-voltage, low resistance semiconductor materials when all three contributing factors are considered: electron mobility, saturation velocity, and energy gap. In particular, the electron mobility of InP, while greater than that of Si, is only about half that of GaAs. Also, the bandgap of InP is somewhat less than that of GaAs, although it is greater than the bandgap of Si. The on-resistance of a GaAs device is lower than the on-resistance of an InP device by a factor of about 2.5.
The on-resistance of GaAs is lower than that of Ga.sub.x In.sub.1-x As, in particular where x=0.47, by a factor of about 3.5. This is primarily due to the lower bandgap of Ga.sub.x In.sub.1-x As, which is only about two-thirds of that of GaAs, although the election mobility of Ga.sub.x In.sub.1-x As (x=0.47) is slightly higher than that of GaAs.